Sr. DFT Engineer, Amazon Leo

Saved job description

Be part of Amazon LEO’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.

In this role you will:

· Architect and define DFT solutions adapted to the specific use of various LEO’s chips.

· Contribute to the improvement and customization of IPs and DFT methodology while embracing AI flow.

. Work with the ASIC design teams in all the sites to incorporate DFT logic like MBIST, clock controls and JTAG controllers.

. Work with RFIC teams to ensure maximum fault coverage on the custom RF blocks.

· Ensure that blocks meet DFT, timing and power targets by working closely with the implementation team.

· Work closely with the Test engineering team to help translate the ATE patterns to tester format.

· Work with the test team to do jointly bring up the digital portions of the LEO chips.

Export Control Requirement:

Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Requirements: - Bachelor's degree in Electrical/Communications Engineering, or experience working in electrical engineering field

- 5+ years of experience in advanced DFT techniques for deep sub-micron nodes.

- Experience implementing DFT methodology and developing automated scripts for DFT Insertion and Validation.