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Amazon

PD Methodology Engineer II, Annapurna Labs

OnsiteEngineering & technologyNot yet verified

United States, CA, Cupertino

Original posting date
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Nov 2, 2026

Saved job description

As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of Hardware in our data centers including technologies such as AWS Inferentia which is a machine learning inference product designed to deliver high performance at low cost.

You’ll provide leadership in the application of new technologies to large scale deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you’ll work with thought-leaders in multiple technology areas. You’ll have relentlessly high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve our products' performance, quality and cost. We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

Key job responsibilities

- You will create and support innovative physical design methodology and CAD flows.

- Develop cloud infrastructure to support physical design work.

- Drive improvement in RTL2GDS flows/methodology for PPA and TAT improvement.

- Create Dashboard/central reports for project tracking and visualizing QoR/stats

- Interface directly with RTL, Physical Design, Package Design, DFT and other teams to improve methodologies and efficiencies and drive efforts to resolution.

- Work with EDA tool vendors to evaluate new tools, solve bugs, improve usability, etc.

Requirements: - Bachelor's degree in Electrical Engineering or a related field

- Minimum of 3+ years in developing design methodology or CAD flows in synthesis, PNR, or sign-off areas for advanced technology nodes

- Experience in writing production scripts for implementation and sign-of. tools in TCL, Perl, and/or Python

- Solid understanding of ASIC physical design, physical design flows, and methodologies including synthesis, place and route, STA, formal verification

- Proven track record of delivering metric driven PPA flow development and support

Location & listing notes

Locations describe the saved posting and do not confirm residence eligibility. Confirm qualifications, travel, restrictions, and availability with the employer.

Source-listed locations: US, Cupertino, California.

Listed states: CA.

This saved listing has not passed full current-posting verification.

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